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Description: ALTERA sdram
vhdl与verilog参考设计-Altera SDRAM VHDL and Verilog reference design
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Size: 2459435 |
Author: 陈东平 |
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Description: 本代码是用VRILOG语言写的SDRAM的控制器的标准代码,供开发SARM参考.-this code is used to write the language VRILOG SDRAM controller standard code for the development of SARM reference.
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Size: 776597 |
Author: 汪旭 |
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Description: Sdr SDRAM控制器参考设计,很好的-Sdr SDRAM controller reference design, very good
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Size: 895594 |
Author: 姚明 |
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Description: sdram的控制器 verilog源码
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Size: 719050 |
Author: 唐业衡 |
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Description: FPGA连接SDRAM的源程序,VHDL语言实现,功能基本完全。应用效果好。
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Size: 731727 |
Author: young |
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Description: Hynix公司8M byte sdr sdram的verilog语言仿真实现。-Hynix company 8M byte sdr sdram realize the Verilog simulation language.
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Size: 105472 |
Author: 张力 |
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Description: 详细介绍了ALTERA器件的IP CORE以及如何使用SDR SDRAM CONTROL-Described in detail ALTERA device IP CORE and how to use SDR SDRAM CONTROL
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Size: 777216 |
Author: 黄辉辉 |
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Description: ALTERA SDR AM Controller White Paper
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Size: 658432 |
Author: 付茗 |
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Description: 标准SDR SDRAM控制器参考设计,有助于大家学习和参考-Standard SDR SDRAM controller reference design will help everyone to learn and reference
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Size: 205824 |
Author: 王廷龙 |
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Description: verilog 代码,读写SDRAM 不带仿真,需要自己编写测试文件-Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
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Size: 19935232 |
Author: ch |
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Description: SDR SDRAM的VHDL描述,比较详细,还有数据手册-SDR SDRAM the VHDL description, more detailed, have data sheet
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Size: 717824 |
Author: 顾康 |
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Description: 基于TI 6416DSP的sdram读写程序-Based on the TI 6416DSP procedures sdram read and write
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Size: 435200 |
Author: 张振 |
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Description: 图像缓存是图像处理系统设计的重点和难点,包括SDRAM和FIFO的设计,本PDF是设计图像缓存设计的好资料-sdram and fifo design for real-time image processing system
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Size: 1146880 |
Author: 张荣奎 |
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Description: verilog 128位 突发4. sdr fpga控制器-verilog 128 bit unexpected 4. sdr fpga controller
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Size: 119808 |
Author: pudnrtest |
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Description: Hynix公司8M Byte SDR SDRAM的Verilog语言仿真实现-Hynix' s 8M Byte SDR SDRAM Simulation of the Verilog language
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Size: 54272 |
Author: tom |
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Description: SDRAM控制器源码,内含完整的控制器verilog源代码和测试代码,超值哈。-This readme file for the SDR SDRAM Controller includes information that was not
incorporated into the SDR SDRAM Controller White Paper v1.1.
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Size: 991232 |
Author: runxin |
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Description: SDR SDRAM 控制器的源代码 altera公司的-source code from altera
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Size: 717824 |
Author: wela |
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Description: SDRAM控制器的Verilog源代码,主要用于SDR-SDRAM-SDRAM controller
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Size: 2824192 |
Author: 金文超 |
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Description: SDR SDRAM 控制器,Altera官网重要资料。内涵说明文档,和VHDL与Verilog两种设计IP。-SDR SDRAM controller from Altera
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Size: 2360320 |
Author: peteryu010 |
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Description: altera 公司sdr sdram 控制器源码,是VHDL的,大家选择下载-The altera sdr sdram controller source, the VHDL, we choose to download
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Size: 16384 |
Author: 梦殇 |
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